DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 46

• Manufacturer Part Number: DS21458LDK
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

7. SPECIAL PER-CHANNEL REGISTER OPERATION
Some of the features described in the data sheet that operate on a per-channel basis use a special method
for channel selection. The registers involved are the per-channel pointer registers (PCPR) and per-channel
data registers 1 to 4 (PCDR1–4). The user selects the function(s) that are to be applied on a per-channel
basis by setting the appropriate bit(s) in the PCPR register. The user then writes to the PCDR registers to
select the channels for that function. The following is an example of mapping the transmit and receive
BERT function to channels 9, 10, 11, 12, 20, and 21:
More information about how to use these per-channel features can be found in their respective sections in
the data sheet.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/BERT Transmit Channel Select (BTCS).
Bit 1/Transmit Fractional Channel Select (TFCS).
Bit 2/Payload Error Insert Channel Select (PEICS).
Bit 3/Transmit Hardware Signaling Channel Select (THSCS).
Bit 4/BERT Receive Channel Select (BRCS).
Bit 5/Receive Fractional Channel Select (RFCS).
Bit 6/Receive Signaling Reinsertion Channel Select (RSRCS).
Bit 7/Receive Signaling All Ones Insertion Channel Select (RSAOICS).
RSAOICS
7
0
RSRCS
PCPR
Per-Channel Pointer Register
28h
6
0
RFCS
5
0
Write 11h to PCPR
Write 00h to PCDR1
Write 0fh to PCDR2
Write 18h to PCDR3
Write 00h to PCDR4
BRCS
4
0
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THSCS
3
0
DS21455/DS21458 Quad T1/E1/J1 Transceivers
PEICS
0
2
TFCS
0
1
BTCS
0
0