DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 242
DS21458LDK
Manufacturer Part Number
DS21458LDK
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS21458LDK.pdf
(269 pages)
- Current page: 242 of 269
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NOTES:
1) 4.096MHz bus configuration.
2) 8.192MHz bus configuration.
3) RSYNC is in the input mode (IOCR1.4 = 0).
Figure 36-15. Receive IBO Channel Interleave Mode Timing
RSYSCLK
RSYNC
RSYNC
RSER
RSER
RSER
RSIG
RSIG
RSIG
3
1
1
2
2
FR2 CH32 FR3 CH32
FR2 CH32 FR3 CH32
FRAMER 3, CHANNEL 32
FRAMER 3, CHANNEL 32
FR1 CH32
FR1 CH32
A
B
C
FR0 CH1
FR0 CH1
LSB
D
FR0 CH1
FR0 CH1
MSB
FR1 CH1
FR1 CH1
FRAMER 0, CHANNEL 1
FRAMER 0, CHANNEL 1
BIT DETAIL
FR2 CH1
FR2 CH1
242 of 269
FR1 CH1
FR1 CH1
A
FR3 CH1
FR3 CH1
B
C
DS21455/DS21458 Quad T1/E1/J1 Transceivers
FR0 CH2
FR0 CH2
LSB
D
MSB
FR0 CH2
FR0 CH2
FR1 CH2
FR1 CH2
FRAMER 1, CHANNEL 1
FRAMER 1, CHANNEL 1
FR2 CH2
FR2 CH2
A
FR1 CH2
FR1 CH2
B
FR3 CH2
FR3 CH2
C
LSB
D
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