DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 125
DS21458LDK
Manufacturer Part Number
DS21458LDK
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS21458LDK.pdf
(269 pages)
- Current page: 125 of 269
- Download datasheet (2Mb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/BOC Bit 0 (RBOC0).
Bit 1/BOC Bit 1 (RBOC1).
Bit 2/BOC Bit 2 (RBOC2).
Bit 3/BOC Bit 3 (RBOC3).
Bit 4/BOC Bit 4 (RBOC4).
Bit 5/BOC Bit 5 (RBOC5).
Bit 6/This bit position is unused when BOCC.4 = 1.
Bit 7/This bit position is unused when BOCC.4 = 1.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Receive BOC Detector Change of State Event (RBOC). Set whenever the BOC detector sees a change of state to a
valid BOC. The setting of this bit prompts the user to read the RFDL register.
Bit 1/Receive FDL Match Event (RMTCH). Set whenever the contents of the RFDL register matches RFDLM1 or
RFDLM2.
Bit 2/TFDL Register Empty Event(TFDLE). Set when the transmit FDL buffer (TFDL) empties.
Bit 3/RFDL Register Full Event (RFDLF). Set when the receive FDL buffer (RFDL) fills to capacity.
Bit 4/RFDL Abort Detect Event (RFDLAD). Set when eight consecutive ones are received on the FDL.
Bit 5/BOC Clear Event (BOCC). Set when 30 FDL bits occur without an abort sequence.
—
—
7
0
7
0
—
—
RFDL (RFDL register bit usage when BOCC.4 = 1)
Receive FDL Register
C0h
SR8
Status Register 8
24h
6
0
6
0
RBOC5
BOCC
5
0
5
0
RFDLAD
RBOC4
4
0
4
0
125 of 269
RBOC3
RFDLF
3
0
3
0
DS21455/DS21458 Quad T1/E1/J1 Transceivers
TFDLE
RBOC2
2
0
2
0
RMTCH
RBOC1
1
0
1
0
RBOC0
RBOC
0
0
0
0
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