DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 228

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DS21458LDK

Manufacturer Part Number
DS21458LDK
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
36. FUNCTIONAL TIMING DIAGRAMS
36.1 T1 Mode
Figure 36-1. Receive Side D4 Timing
NOTES:
1) RSYNC in the frame mode (IOCR1.5 = 0) and double-wide frame sync is not enabled (IOCR1.6 = 0).
2) RSYNC in the frame mode (IOCR1.5 = 0) and double-wide frame sync is enabled (IOCR1.6 = 1).
3) RSYNC in the multiframe mode (IOCR1.5 = 1).
4) RLINK data (Fs-bits) is updated one bit prior to even frames and held for two frames.
RFSYNC
RSYNC
RSYNC
RSYNC
FRAME#
RLINK
RLCLK
4
3
1
2
1
2
3
4
5
6
7
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DS21455/DS21458 Quad T1/E1/J1 Transceivers
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12
1
2
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5

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