DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 169
DS21458LDK
Manufacturer Part Number
DS21458LDK
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS21458LDK.pdf
(269 pages)
- Current page: 169 of 269
- Download datasheet (2Mb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 1/Receive Termination Select (RT0 to RT1).
Bits 2 to 3/Transmit Termination Select (TT0 to TT1).
Bits 4 and 5/MCLK Prescaler for T1 Mode.
Bits 4 and 5/MCLK Prescaler for E1 Mode.
Bit 6/CMI Invert (CMII).
Bit 7/CMI Enable (CMIE).
MCLK
MCLK
RT1
TT1
(MHz)
(MHz)
12.352
16.384
16.384
1.544
3.088
6.176
2.048
4.096
8.192
2.048
4.096
8.192
0
0
1
1
0
0
1
1
0 = CMI normal at TTIP and RTIP
1 = invert CMI signal at TTIP and RTIP
0 = disable CMI mode
1 = enable CMI mode
RT0
TT0
CMIE
0
1
0
1
0
1
0
1
7
0
MPS1
MPS1
0
0
1
1
0
0
1
1
0
0
1
1
Internal Receive-Side Termination Disabled
Internal Receive-Side 75Ω Enabled
Internal Receive-Side 100Ω Enabled
Internal Receive-Side 120Ω Enabled
Internal Transmit-Side Termination Disabled
Internal Transmit-Side 75Ω Enabled
Internal Transmit-Side 100Ω Enabled
Internal Transmit-Side 120Ω Enabled
INTERNAL RECEIVE TERMINATION
TERMINATION CONFIGURATION
CMII
LIC4
Line Interface Control 4
7Bh
6
0
MPS0
MPS0
INTERNAL TRANSMIT
0
1
0
1
0
1
0
1
0
1
0
1
CONFIGURATION
MPS1
5
0
JAMUX
(LIC2.3)
JAMUX
(LIC2.3)
0
0
0
0
1
1
1
1
0
0
0
0
MPS0
4
0
169 of 269
TT1
3
0
DS21455/DS21458 Quad T1/E1/J1 Transceivers
TT0
2
0
RT1
1
0
RT0
0
0
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