DS21458LDK Maxim Integrated, DS21458LDK Datasheet - Page 240

• Manufacturer Part Number: DS21458LDK
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Figure 36-13. Receive Side Boundary Timing, RSYSCLK = 1.544MHz
(With Elastic Store Enabled)
NOTES:
1) Data from the E1 channels 1, 5, 9, 13, 17, 21, 25, and 29 is dropped (channel 2 from the E1 link is
2) RSYNC in the output mode (IOCR1.4 = 0).
3) RSYNC in the input mode (IOCR1.4 = 1).
4) RCHBLK is programmed to block channel 24.
mapped to channel 1 of the T1 link, etc.) and the F-bit position is added (forced to one).
RCHBLK
RSYSCLK
RMSYNC
RCHCLK
RSYNC
RSYNC
RSER
1
3
4
2
CHANNEL 23/31
LSB
MSB
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CHANNEL 24/32
DS21455/DS21458 Quad T1/E1/J1 Transceivers
LSB
F
MSB
CHANNEL 1/2