S25FL512SAGMFIG13 Spansion, S25FL512SAGMFIG13 Datasheet - Page 53
![no-image](/images/no-image-200.jpg)
S25FL512SAGMFIG13
Manufacturer Part Number
S25FL512SAGMFIG13
Description
Flash 512Mb 3V 133MHz Serial NOR Flash
Manufacturer
Spansion
Datasheet
1.S25FL512SAGMFI011.pdf
(143 pages)
Specifications of S25FL512SAGMFIG13
Rohs
yes
Memory Type
Flash
Memory Size
512 MB
Architecture
Uniform
Timing Type
Asynchronous
Interface Type
SPI
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
SO-16
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Software Interface
8. Address Space Maps
8.1
8.2
8.3
June 13, 2012 S25FL512S_00_04
8.1.1
8.1.2
Overview
Flash Memory Array
ID-CFI Address Space
Extended Address
Multiple Address Spaces
This section discusses the features and behaviors most relevant to host system software that interacts with
the S25FL512S memory device.
The S25FL512S device supports 32-bit addresses to enable higher density devices than allowed by previous
generation (legacy) SPI devices that supported only 24-bit addresses. A 24-bit byte resolution address can
access only 16 Mbytes (128 Mbits) of maximum density. A 32-bit byte resolution address allows direct
addressing of up to a 4 Gbytes (32 Gbits) of address space.
Legacy commands continue to support 24-bit addresses for backward software compatibility. Extended 32-bit
addresses are enabled in three ways:
Bank address register — a software (command) loadable internal register that supplies the high order bits
Extended address mode — a bank address register bit that changes all legacy commands to expect 32 bits
New commands — that perform both legacy and new functions, which expect 32-bit address.
The default condition at power-up and after reset, is the Bank address register loaded with zeros and the
extended address mode set for 24-bit addresses. This enables legacy software compatible access to the first
128 Mbits of a device.
Many commands operate on the main flash memory array. Some commands operate on address spaces
separate from the main flash array. Each separate address space uses the full 32-bit address but may only
define a small portion of the available address space.
The main flash array is divided into erase units called sectors. The sectors are organized as uniform
256-kbyte sectors.
Note: This is a condensed table that uses a sector as a reference. There are address ranges that are not
explicitly listed. All 256 kB sectors have the pattern XXXX0000h-XXXXFFFFh.
The RDIDJ command (9Fh) reads information from a separate flash memory address space for device
identification (ID) and Common Flash Interface (CFI) information. See
Interface (ID-CFI) Address Map on page 124
The ID-CFI address space is programmed by Spansion and read-only for the host system.
of address when legacy 24-bit addresses are in use.
of address supplied from the host system.
Sector Size (kbyte)
256
Table 8.1 S25FL512S Sector and Memory Address Map, Uniform 256-kbyte Sectors
D a t a
S h e e t
Sector Count
256
( P r e l i m i n a r y )
S25FL512S
for the tables defining the contents of the ID-CFI address space.
Sector Range
SA255
SA00
:
03FC0000h-03FFFFFFh
00000000h-0003FFFFh
Address Range (8-bit)
Device ID and Common Flash
:
Sector Starting Address
Sector Ending Address
Notes
—
53
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