S25FL512SAGMFIG13 Spansion, S25FL512SAGMFIG13 Datasheet - Page 15

• Manufacturer Part Number: S25FL512SAGMFIG13
• Description: Flash 512Mb 3V 133MHz Serial NOR Flash
• Manufacturer: Spansion

Specifications of S25FL512SAGMFIG13

• Rohs: yes
• Memory Type: Flash
• Memory Size: 512 MB
• Architecture: Uniform
• Timing Type: Asynchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SO-16

2.3
2.4
June 13, 2012 S25FL512S_00_04
2.4.1
2.4.2
2.4.3
Glossary
Other Resources
Links to Software
Links to Application Notes
Specification Bulletins
http://www.spansion.com/Support/Pages/Support.aspx
http://www.spansion.com/Support/TechnicalDocuments/Pages/ApplicationNotes.aspx
Specification bulletins provide information on temporary differences in feature description or parametric
variance since the publication of the last full data sheet. Contact your local sales office for details. Obtain the
latest list of company locations and contact information at:
http://www.spansion.com/About/Pages/Locations.aspx
Command
DDP
(Dual Die Package)
DDR
(Double Data Rate)
Flash
High
Instruction
Low
LSB
(Least Significant Bit)
MSB
(Most Significant Bit)
Non-Volatile
OPN
(Ordering Part Number)
Page
PCB
Register Bit References
SDR
(Single Data Rate)
Sector
Write
D a t a
S h e e t
All information transferred between the host system and memory during one period while
CS# is low. This includes the instruction (sometimes called an operation code or opcode) and
any required address, mode bits, latency cycles, or data.
Two die stacked within the same package to increase the memory capacity of a single
package. Often also referred to as a Multi-Chip Package (MCP).
When input and output are latched on every edge of SCK.
erases large blocks of memory bits in parallel, making the erase operation much faster than
early EEPROM.
The 8 bit code indicating the function to be performed by a command (sometimes called an
operation code or opcode). The instruction is always the first 8 bits transferred from host
system to the memory in any command.
A signal voltage level  V
Generally the right most bit, with the lowest order of magnitude value, within a group of bits of
a register or data value.
Generally the left most bit, with the highest order of magnitude value, within a group of bits of
a register or data value.
No power is needed to maintain data stored in the memory.
The alphanumeric string specifying the memory device type, density, package, factory non-
volatile configuration, etc. used to select the desired device.
512 bytes aligned and length group of data.
Printed Circuit Board.
bit_range_LSB].
When input is latched on the rising edge and output on the falling edge of SCK.
Erase unit size 256 kbytes.
An operation that changes data within volatile or non-volatile registers bits or non-volatile
flash memory. When changing non-volatile data, an erase and reprogramming of any
unchanged non-volatile data is done, as part of the operation, such that the non-volatile data
is modified by the write operation, in the same way that volatile data is modified – as a single
operation. The non-volatile data appears to the host system to be updated by the single write
command, without the need for separate commands for erase and reprogram of adjacent, but
unaffected data.
The name for a type of Electrical Erase Programmable Read Only Memory (EEPROM) that
A signal voltage level ≥ V
Are in the format: Register_name[bit_number] or Register_name[bit_range_MSB:
( P r e l i m i n a r y )
S25FL512S
IH
IL
or a logic level representing a binary zero (0).
or a logic level representing a binary one (1).
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