S25FL512SAGMFIG13 Spansion, S25FL512SAGMFIG13 Datasheet - Page 105

• Manufacturer Part Number: S25FL512SAGMFIG13
• Description: Flash 512Mb 3V 133MHz Serial NOR Flash
• Manufacturer: Spansion

Specifications of S25FL512SAGMFIG13

• Rohs: yes
• Memory Type: Flash
• Memory Size: 512 MB
• Architecture: Uniform
• Timing Type: Asynchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SO-16

10.5
June 13, 2012 S25FL512S_00_04
10.5.1
10.5.2
10.5.1.1
10.5.1.2
Program Flash Array Commands
Program Granularity
Page Program (PP 02h or 4PP 12h):
Page Programming
Page Programming is done by loading a Page Buffer with data to be programmed and issuing a programming
command to move data from the buffer to the memory array. This sets an upper limit on the amount of data
that can be programmed with a single programming command. Page Programming allows up to a page size
(512 bytes) to be programmed in one operation. The page is aligned on the page size address boundary. It is
possible to program from one bit up to a page size in each Page programming operation. It is recommended
that a multiple of 16 byte length and aligned Program Blocks be written. For the very best performance,
programming should be done in full pages of 512 bytes aligned on 512-byte boundaries with each Page being
programmed only once.
Single Byte Programming
Single Byte Programming allows full backward compatibility to the standard SPI Page Programming (PP)
command by allowing a single byte to be programmed anywhere in the memory array.
The Page Program (PP) commands allows bytes to be programmed in the memory (changing bits from 1 to
0). Before the Page Program (PP) commands can be accepted by the device, a Write Enable (WREN)
command must be issued and decoded by the device. After the Write Enable (WREN) command has been
decoded successfully, the device sets the Write Enable Latch (WEL) in the Status Register to enable any
write operations.
The instruction
 02h (ExtAdd=0) is followed by a 3-byte address (A23-A0) or
 02h (ExtAdd=1) is followed by a 4-byte address (A31-A0) or
 12h is followed by a 4-byte address (A31-A0)
and at least one data byte on SI. Up to a page can be provided on SI after the 3-byte address with instruction
02h or 4-byte address with instruction 12h has been provided. If the 9 least significant address bits (A8-A0)
are not all zero, all transmitted data that goes beyond the end of the current page are programmed from the
start address of the same page (from the address whose 9 least significant bits (A8-A0) are all zero) i.e. the
address wraps within the page aligned address boundaries. This is a result of only requiring the user to enter
one single page address to cover the entire page boundary.
If less than a page of data is sent to the device, these data bytes will be programmed in sequence, starting at
the provided address within the page, without having any affect on the other bytes of the same page.
For optimized timings, using the Page Program (PP) command to load the entire page size program buffer
within the page boundary will save overall programming time versus loading less than a page size into the
program buffer.
The programming process is managed by the flash memory device internal control logic. After a programming
command is issued, the programming operation status can be checked using the Read Status Register-1
command. The WIP bit (SR1[0]) will indicate when the programming operation is completed. The P_ERR bit
(SR1[6]) will indicate if an error occurs in the programming operation that prevents successful completion of
programming.
D a t a
S h e e t
( P r e l i m i n a r y )
S25FL512S
105