S25FL512SAGMFIG13 Spansion, S25FL512SAGMFIG13 Datasheet - Page 32

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S25FL512SAGMFIG13

Manufacturer Part Number
S25FL512SAGMFIG13
Description
Flash 512Mb 3V 133MHz Serial NOR Flash
Manufacturer
Spansion
Datasheet

Specifications of S25FL512SAGMFIG13

Rohs
yes
Memory Type
Flash
Memory Size
512 MB
Architecture
Uniform
Timing Type
Asynchronous
Interface Type
SPI
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
SO-16
4.4
4.5
32
4.5.1
4.5.2
4.5.3
Configuration Register Effects on the Interface
Data Protection
Power-Up
Low Power
Clock Pulse Count
The configuration register bits 7 and 6 (CR1[7:6]) select the latency code for all read commands. The latency
code selects the number of mode bit and latency cycles for each type of instruction.
The configuration register bit 1 (CR1[1]) selects whether Quad mode is enabled to ignore HOLD# and WP#
and allow Quad Page Program, Quad Output Read, and Quad I/O Read commands. Quad mode must also
be selected to allow Read DDR Quad I/O commands.
Some basic protection against unintended changes to stored data are provided and controlled purely by the
hardware design. These are described below. Other software managed protection methods are discussed in
the software section
When the core supply voltage is at or below the V
The device does not react to external signals, and is prevented from performing any program or erase
operation. Program and erase operations continue to be prevented during the Power-on Reset (POR)
because no command is accepted until the exit from POR to the Interface Standby state.
When V
erase operations can not start when the core supply voltage is out of the operating range.
The device verifies that all program, erase, and Write Registers (WRR) commands consist of a clock pulse
count that is a multiple of eight before executing them. A command not having a multiple of 8 clock pulse
count is ignored and no error status is set for the command.
CC
is less than V
(page
CC
53) of this document.
(cut-off) the memory device will ignore commands to ensure that program and
D a t a
S25FL512S
S h e e t
CC
(low) voltage, the device is considered to be powered off.
( P r e l i m i n a r y )
S25FL512S_00_04 June 13, 2012

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