S25FL512SAGMFIG13 Spansion, S25FL512SAGMFIG13 Datasheet - Page 39

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S25FL512SAGMFIG13

Manufacturer Part Number
S25FL512SAGMFIG13
Description
Flash 512Mb 3V 133MHz Serial NOR Flash
Manufacturer
Spansion
Datasheet

Specifications of S25FL512SAGMFIG13

Rohs
yes
Memory Type
Flash
Memory Size
512 MB
Architecture
Uniform
Timing Type
Asynchronous
Interface Type
SPI
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
SO-16
June 13, 2012 S25FL512S_00_04
6.3.2
Hardware (Warm) Reset
When the RESET# input transitions from V
power-on reset but, does not go through the full reset process that is performed during POR. The hardware
reset process requires a period of t
reason during power-up (t
reset process and will require t
The RESET# input provides a hardware method of resetting the flash memory device to standby state.
 RESET# must be high for t
 When RESET# is driven low for at least a minimum period of time (t
 If CS# is low at the time RESET# is asserted, CS# must return high during t
 Hardware Reset is only offered in 16-lead SOIC and BGA packages.
Notes:
1. RESET# Low is optional and ignored during Power-up (t
2. Sum of t
RESET#
RESET#
operation in progress, tri-states all outputs, and ignores all read/write commands for the duration of t
The device resets the interface to standby state.
low again after t
state and t
VCC
CS#
VIO
CS#
Parameter
t
RP
t
RPH
t
t
RS
RP
RH
RH
and t
D a t a
will determine when CS# may go Low.
RH
must be equal to or greater than t
RH
.
S h e e t
Prior Reset end and RESET# high before RESET# low
PU
Any prior reset
Reset Pulse Hold - RESET# low to CS# low
Reset Hold - RESET# high before CS# low
), RESET# going low will initiate the full POR process instead of the hardware
RS
PU
Figure 6.6 POR followed by Hardware Reset
following t
to complete the POR process.
( P r e l i m i n a r y )
Table 6.3 Hardware Reset Parameters
RPH
tRPH
RESET# Pulse Width
to complete. If the POR process did not complete correctly for any
Reset Setup -
S25FL512S
Description
Figure 6.7 Hardware Reset
IH
PU
RPH.
tPU
tPU
to V
or t
PU
). If Reset# is asserted during the end of t
IL
RPH
the device will reset register states in the same manner as
, before going low again to initiate a hardware reset.
tRH
tRS
RP
Limit
), the device terminates any
Min
Min
Min
Min
tRP
RPH
tRS
PU
, the device will remain in the reset
tRPH
before it can be asserted
Time
200
50
35
50
tRH
Unit
ns
µs
ns
ns
RPH
39
.

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