C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 323

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C8051F962-A-GM

Manufacturer Part Number
C8051F962-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F962-A-GM

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
DQFN-76
Mounting Style
SMD/SMT
Number Of Programmable I/os
57
Number Of Timers
4
SFR Definition 25.3. PC0TH: PC0 Threshold Configuration
SFR Address = 0xE4; SFR Page = 0x2
Name
Reset
Bit
7:6
5:4
Type
3
2
1
0
Bit
PCTTHRESHI[1:0]
PCTHRESLO
PCTTHRESHI[1:0]
Reserved
RDVALID
PDOWN
7
0
Name
PUP
R/W
[1:0]
6
0
Pulse Counter Input Comparator VIH Threshold
(Percentage of VIO.)
10: 50%
11: 55%
00: 59%
01: 63%
Pulse Counter Input Comparator VIL Threshold
(percentage of VIO.)
10: 34%
11: 38%
00: 42%
01: 46%
Force Pull-Down On
0: PC0 and PC1 pull-down not forced on.
1: PC0 and PC1 grounded.
Force Pull-Up
0: PC0 and PC1 pull-up not forced on continuously. See PC0PCF[1:0] for
duty cycle.
1: PC0 and PC1 pulled high continuously to the PC0PCF[4:2] setting.
PDOWN overrides PUP setting.
Read Valid
Holds the status of the last read for real-time registers PC0STAT, PC0HIST,
PC0CTR0L, PC0CTR1L, PC0INT0, and PC0INT1.
0: The last read was invalid.
1: The last read was valid.
RDVALID is set back to 1 upon reading.
PCTHRESLO
5
0
R/W
Rev. 0.5
[1:0]
4
0
PDOWN
R/W
3
0
Function
PUP
R/W
2
0
C8051F96x
R
1
0
RDVALID
R/W
0
1
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