C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 155

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C8051F962-A-GM

Manufacturer Part Number
C8051F962-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F962-A-GM

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
DQFN-76
Mounting Style
SMD/SMT
Number Of Programmable I/os
57
Number Of Timers
4
SFR Definition 11.6. DMA0NMD: DMA Channel Mode
SFR Page = 0x2; SFR Address = 0xD6
Note: This sfr is a DMA channel indirect register. Select the desired channel first using the DMA0SEL sfr.
7:1
Bit
Name
Reset
0
Type
Bit
reserved
WRAP
Name
R/W
7
0
R/W
6
0
Read = 0, Write = 0
Wrap Enable.
Setting this bit will enable wrapping.
The DMA0NSZ register sets the transfer size. Normally the DMA0AO value
starts at zero in increases to the DMANSZ minus one. At this point the trans-
fer is complete and the interrupt bit will be set. If the WRAP bit is set, the
DMA0NAO will be reset to zero.
R/W
5
0
Rev. 0.5
R/W
4
0
Function
R/W
3
0
R/W
2
0
C8051F96x
R/W
1
0
WRAP
R/W
0
0
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