C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 295

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C8051F962-A-GM

Manufacturer Part Number
C8051F962-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F962-A-GM

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
DQFN-76
Mounting Style
SMD/SMT
Number Of Programmable I/os
57
Number Of Timers
4
24. SmaRTClock (Real Time Clock)
C8051F96x devices include an ultra low power 32-bit SmaRTClock Peripheral (Real Time Clock) with
alarm. The SmaRTClock has a dedicated 32 kHz oscillator that can be configured for use with or without a
crystal. No external resistor or loading capacitors are required. The on-chip loading capacitors are pro-
grammable to 16 discrete levels allowing compatibility with a wide range of crystals. The SmaRTClock can
operate directly from a 1.8–3.6 V battery voltage and remains operational even when the device goes into
its lowest power down mode. The SmaRTClock output can be buffered and routed to a GPIO pin to provide
an accurate, low frequency clock to other devices while the MCU is in its lowest power down mode (see
“PMU0MD: Power Management Unit Mode” on page 267 for more details). C8051F96x devices also sup-
port an ultra low power internal LFO that reduces sleep mode current.
The SmaRTClock allows a maximum of 36 hour 32-bit independent time-keeping when used with a
32.768 kHz Watch Crystal. The SmaRTClock provides an Alarm and Missing SmaRTClock events, which
could be used as reset or wakeup sources. See Section “22. Reset Sources” on page 278 and Section
“19. Power Management” on page 257 for details on reset sources and low power mode wake-up sources,
respectively.
XTAL4
Registers
Programmable Load Capacitors
Internal
SmaRTClock State Machine
w/ 3 Independent Alarms
SmaRTClock
SmaRTClock Oscillator
Figure 24.1. SmaRTClock Block Diagram
ALARMnBn
CAPTUREn
RTC0XCN
RTC0XCF
RTC0CN
RTC0CF
XTAL3
Wake-Up
Interrupt
Rev. 0.5
RTCOUT
RTC0KEY
RTC0ADR
RTC0DAT
Registers
Interface
SmaRTClock
32-Bit
Timer
LFO
Power/
Clock
Mgmt
C8051F96x
295

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