C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 159

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C8051F962-A-GM

Manufacturer Part Number
C8051F962-A-GM
Description
8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F962-A-GM

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
128 KB
Data Ram Size
8448 B
On-chip Adc
Yes
Operating Supply Voltage
2.5 V to 3.3 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
DQFN-76
Mounting Style
SMD/SMT
Number Of Programmable I/os
57
Number Of Timers
4
SFR Definition 11.12. DMA0NSZH: Transfer Size High Byte
SFR Page = 0x2; SFR Address = 0xCF
SFR Definition 11.13. DMA0NSZL: Memory Transfer Size Low Byte
SFR Page = 0x2; SFR Address = 0xCE
Note: This sfr is a DMA channel indirect register. Select the desired channel first using the DMA0SEL sfr.
Note: This sfr is a DMA channel indirect register. Select the desired channel first using the DMA0SEL sfr.
7:2
1:0
7:0
Bit
Bit
Name
Reset
Name
Reset
Type
Type
Bit
Bit
NSZH[1:0]
NSZL[7:0]
Unused
Name
Name
R
7
0
7
0
R
6
0
6
0
Read = 0b, Write = Don’t Care
Transfer Size High Byte.
Sets high byte of DMA0 transfer size of the selected channel. Transfer size
sets the maximum number of bytes for the DMA0 transfer. When the
address offset is equal to the transfer size, a full-length interrupt is gener-
ated on the channel.
Memory Transfer Size Low Byte.
Sets low byte of DMA0 transfer size of the selected channel. Transfer size
sets the maximum number of bytes for the DMA0 transfer. When the
address offset is equal to the transfer size, a full-length interrupt is gener-
ated on the channel.
R
5
0
5
0
Rev. 0.5
R
4
0
4
0
NSZL[7:0]
R/W
Function
Function
R
3
0
3
0
R
2
0
2
0
C8051F96x
1
0
1
0
NSZH[1:0]
R/W
0
0
0
0
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