C8051F962-A-GM Silicon Labs, C8051F962-A-GM Datasheet - Page 18

• Manufacturer Part Number: C8051F962-A-GM
• Description: 8-bit Microcontrollers - MCU 128KB, DC-DC, AES DQFN76
• Manufacturer: Silicon Labs

Specifications of C8051F962-A-GM

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 128 KB
• Data Ram Size: 8448 B
• On-chip Adc: Yes
• Operating Supply Voltage: 2.5 V to 3.3 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: DQFN-76
• Mounting Style: SMD/SMT
• Number Of Programmable I/os: 57
• Number Of Timers: 4

C8051F96x
SFR Definition 11.11. DMA0NAOL: Memory Address Offset Low Byte ..................... 158
SFR Definition 11.12. DMA0NSZH: Transfer Size High Byte ..................................... 159
SFR Definition 11.13. DMA0NSZL: Memory Transfer Size Low Byte ........................ 159
SFR Definition 12.1. CRC0CN: CRC0 Control ........................................................... 164
SFR Definition 12.2. CRC0IN: CRC0 Data Input ........................................................ 165
SFR Definition 12.3. CRC0DAT: CRC0 Data Output .................................................. 165
SFR Definition 12.4. CRC0AUTO: CRC0 Automatic Control ...................................... 166
SFR Definition 12.5. CRC0CNT: CRC0 Automatic Flash Sector Count ..................... 166
SFR Definition 12.6. CRC0FLIP: CRC0 Bit Flip .......................................................... 167
SFR Definition 13.1. CRC1CN: CRC1 Control ........................................................... 172
SFR Definition 13.2. CRC1IN: CRC1 Data IN ............................................................ 173
SFR Definition 13.3. CRC1POLL: CRC1 Polynomial LSB .......................................... 173
SFR Definition 13.4. CRC1POLH: CRC1 Polynomial MSB ........................................ 173
SFR Definition 13.5. CRC1OUTL: CRC1 Output LSB ................................................ 174
SFR Definition 13.6. CRC1OUTH: CRC1 Output MSB .............................................. 174
SFR Definition 14.1. AES0BCFG: AES Block Configuration ...................................... 202
SFR Definition 14.2. AES0DCFG: AES Data Configuration ....................................... 203
SFR Definition 14.3. AES0BIN: AES Block Input ........................................................ 204
SFR Definition 14.4. AES0XIN: AES XOR Input ......................................................... 205
SFR Definition 14.5. AES0KIN: AES Key Input .......................................................... 205
SFR Definition 14.6. AES0YOUT: AES Y Output ....................................................... 206
SFR Definition 15.1. ENC0CN: Encoder Decoder 0 Control ...................................... 214
SFR Definition 15.2. ENC0L: ENC0 Data Low Byte ................................................... 215
SFR Definition 15.3. ENC0M: ENC0 Data Middle Byte .............................................. 215
SFR Definition 15.4. ENC0H: ENC0 Data High Byte .................................................. 215
SFR Definition 16.1. SFRPGCN: SFR Page Control .................................................. 218
SFR Definition 16.2. SFRPAGE: SFR Page ............................................................... 219
SFR Definition 16.3. SFRNEXT: SFR Next ................................................................ 220
SFR Definition 16.4. SFRLAST: SFR Last .................................................................. 221
SFR Definition 17.1. IE: Interrupt Enable .................................................................... 236
SFR Definition 17.2. IP: Interrupt Priority .................................................................... 237
SFR Definition 17.3. EIE1: Extended Interrupt Enable 1 ............................................ 238
SFR Definition 17.4. EIP1: Extended Interrupt Priority 1 ............................................ 239
SFR Definition 17.5. EIE2: Extended Interrupt Enable 2 ............................................ 240
SFR Definition 17.6. EIP2: Extended Interrupt Priority 2 ............................................ 241
SFR Definition 17.7. IT01CF: INT0/INT1 Configuration .............................................. 243
SFR Definition 18.1. DEVICEID: Device Identification ................................................ 249
SFR Definition 18.2. REVID: Revision Identification ................................................... 249
SFR Definition 18.3. PSCTL: Program Store R/W Control ......................................... 253
SFR Definition 18.4. FLKEY: Flash Lock and Key ...................................................... 254
SFR Definition 18.5. FLSCL: Flash Scale ................................................................... 255
SFR Definition 18.6. FLWR: Flash Write Only ............................................................ 255
SFR Definition 18.7. FRBCN: Flash Read Buffer Control ........................................... 256
SFR Definition 19.1. PCLKACT: Peripheral Active Clock Enable ............................... 260
SFR Definition 19.2. PCLKEN: Peripheral Clock Enable ............................................ 261
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