ATMEGA128-16AU SL383 Atmel, ATMEGA128-16AU SL383 Datasheet - Page 80

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ATMEGA128-16AU SL383

Manufacturer Part Number
ATMEGA128-16AU SL383
Description
Manufacturer
Atmel
Datasheet
80
ATmega128
Table 37. Overriding Signals for Alternate Functions PD7..PD4
Table 38. Overriding Signals for Alternate Functions in PD3..PD0
Note:
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
1. When enabled, the Two-wire Serial Interface enables Slew-Rate controls on the output pins
PD0 and PD1. This is not shown in this table. In addition, spike filters are connected between
the AIO outputs shown in the port figure and the digital logic of the TWI module.
PD3/INT3/TXD1
TXEN1
0
TXEN1
1
TXEN1
TXD1
INT3 ENABLE
1
INT3 INPUT
PD7/T2
0
0
0
0
0
0
0
0
T2 INPUT
PD2/INT2/RXD1
RXEN1
PORTD2 • PUD
RXEN1
0
0
0
INT2 ENABLE
1
INT2 INPUT/RXD1
PD6/T1
0
0
0
0
0
0
0
0
T1 INPUT
PD5/XCK1
0
0
0
0
UMSEL1
XCK1 OUTPUT
0
0
XCK1 INPUT
TWEN
PORTD1 • PUD
TWEN
SDA_OUT
1
SDA INPUT
PD1/INT1/SDA
TWEN
0
INT1 ENABLE
INT1 INPUT
(1)
PD0/INT0/SCL
TWEN
PORTD0 • PUD
TWEN
SCL_OUT
TWEN
0
INT0 ENABLE
1
INT0 INPUT
SCL INPUT
PD4/ICP1
0
0
0
0
0
0
0
0
ICP1 INPUT
2467S–AVR–07/09

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