ATMEGA128-16AU SL383 Atmel, ATMEGA128-16AU SL383 Datasheet - Page 192

• Manufacturer Part Number: ATMEGA128-16AU SL383
• Manufacturer: Atmel

USART Baud Rate
Registers – UBRRnL
and UBRRnH
192
ATmega128
• Bit 3 – USBSn: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver ignores
this setting.
Table 79. USBSn Bit Settings
• Bit 2:1 – UCSZn1:0: Character Size
The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data bits
(character size) in a frame the Receiver and Transmitter use.
Table 80. UCSZn Bits Settings
• Bit 0 – UCPOLn: Clock Polarity
This bit is used for synchronous mode only. Write this bit to zero when Asynchronous mode is
used. The UCPOLn bit sets the relationship between data output change and data input sample,
and the synchronous clock (XCKn).
Table 81. UCPOLn Bit Settings
UBRRnH is not available in mega103 compatibility mode
Bit
Read/Write
Initial Value
UCPOLn
0
1
UCSZn2
0
0
0
0
1
1
1
1
Transmitted Data Changed (Output of
TxDn Pin)
Rising XCKn Edge
Falling XCKn Edge
USBSn
R/W
15
R
–
7
0
0
0
1
R/W
UCSZn1
14
R
–
6
0
0
0
0
1
1
0
0
1
1
R/W
13
R
–
5
0
0
R/W
12
R
–
UBRRn[7:0]
4
0
0
UCSZn0
0
1
0
1
0
1
0
1
R/W
R/W
11
3
0
0
Received Data Sampled (Input on
RxDn Pin)
Falling XCKn Edge
Rising XCKn Edge
Stop Bit(s)
R/W
R/W
Character Size
5-bit
6-bit
7-bit
8-bit
Reserved
Reserved
Reserved
9-bit
10
UBRRn[11:8]
2
0
0
2-bits
1-bit
R/W
R/W
9
1
0
0
R/W
R/W
8
0
0
0
UBRRnH
UBRRnL
2467S–AVR–07/09