ATMEGA128-16AU SL383 Atmel, ATMEGA128-16AU SL383 Datasheet - Page 38
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ATMEGA128-16AU SL383
Manufacturer Part Number
ATMEGA128-16AU SL383
Description
Manufacturer
Atmel
Datasheet
1.ATMEGA128-16AU_SL383.pdf
(386 pages)
- Current page: 38 of 386
- Download datasheet (7Mb)
Default Clock
Source
38
ATmega128
Table 6. Device Clocking Options Select
Note:
The various choices for each clocking option is given in the following sections. When the CPU
wakes up from Power-down or Power-save, the selected clock source is used to time the start-
up, ensuring stable Oscillator operation before instruction execution starts. When the CPU starts
from reset, there is as an additional delay allowing the power to reach a stable level before com-
mencing normal operation. The Watchdog Oscillator is used for timing this real-time part of the
start-up time. The number of WDT Oscillator cycles used for each time-out is shown in
The frequency of the Watchdog Oscillator is voltage dependent as shown in the
acteristics” on page
Table 7. Number of Watchdog Oscillator Cycles
The device is shipped with CKSEL = “0001” and SUT = “10”. The default clock source setting is
therefore the Internal RC Oscillator with longest startup time. This default setting ensures that all
users can make their desired clock source setting using an In-System or Parallel Programmer.
Device Clocking Option
External RC Oscillator
Calibrated Internal RC Oscillator
External Clock
Typical Time-out (V
1. For all fuses “1” means unprogrammed while “0” means programmed.
4.1 ms
65 ms
333.
CC
= 5.0V)
Typical Time-Out (V
4.3 ms
69 ms
CC
= 3.0V)
Number of Cycles
CKSEL3..0
1000 - 0101
0100 - 0001
64K (65,536)
4K (4,096)
0000
(1)
“Typical Char-
2467S–AVR–07/09
Table
7.
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