ATMEGA128-16AU SL383 Atmel, ATMEGA128-16AU SL383 Datasheet - Page 50

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ATMEGA128-16AU SL383

Manufacturer Part Number
ATMEGA128-16AU SL383
Description
Manufacturer
Atmel
Datasheet
System Control
and Reset
Resetting the AVR
Reset Sources
50
ATmega128
During Reset, all I/O registers are set to their initial values, and the program starts execution
from the Reset Vector. The instruction placed at the Reset Vector must be a JMP – absolute
jump – instruction to the reset handling routine. If the program never enables an interrupt
source, the interrupt vectors are not used, and regular program code can be placed at these
locations. This is also the case if the Reset Vector is in the Application section while the interrupt
vectors are in the Boot section or vice versa. The circuit diagram in
logic.
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The time-out
period of the delay counter is defined by the user through the CKSEL fuses. The different selec-
tions for the delay period are presented in
The ATmega128 has five sources of reset:
Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset
threshold (V
External Reset. The MCU is reset when a low level is present on the RESET pin for longer
than the minimum pulse length.
Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and the
Watchdog is enabled.
Brown-out Reset. The MCU is reset when the supply voltage V
Reset threshold (V
JTAG AVR Reset. The MCU is reset as long as there is a logic one in the Reset Register,
one of the scan chains of the JTAG system. Refer to the section
Boundary-scan” on page 252
Table 19
defines the electrical parameters of the reset circuitry.
POT
).
BOT
) and the Brown-out Detector is enabled.
for details.
“Clock Sources” on page
CC
37.
“IEEE 1149.1 (JTAG)
Figure 22
is below the Brown-out
shows the reset
2467S–AVR–07/09

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