ATMEGA128-16AU SL383 Atmel, ATMEGA128-16AU SL383 Datasheet - Page 135

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ATMEGA128-16AU SL383

Manufacturer Part Number
ATMEGA128-16AU SL383
Description
Manufacturer
Atmel
Datasheet
Table 61. Waveform Generation Mode Bit Description
Note:
2467S–AVR–07/09
Mode
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
1. The CTCn and PWMn1:0 bit definition names are obsolete. Use the
WGMn3
location of these bits are compatible with previous versions of the timer.
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
WGMn2
(CTCn)
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
• Bit 1:0 – WGMn1:0: Waveform Generation Mode
Combined with the WGMn3:2 bits found in the TCCRnB Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode, and three types
of Pulse Width Modulation (PWM) modes.
(PWMn1)
WGMn1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
(PWMn0)
WGMn0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Normal
PWM, Phase Correct, 8-bit
PWM, Phase Correct, 9-bit
PWM, Phase Correct, 10-bit
CTC
Fast PWM, 8-bit
Fast PWM, 9-bit
Fast PWM, 10-bit
PWM, Phase and Frequency
Correct
PWM, Phase and Frequency
Correct
PWM, Phase Correct
PWM, Phase Correct
CTC
(Reserved)
Fast PWM
Fast PWM
Timer/Counter Mode of
Table
Operation
61. Modes of operation supported by the Timer/Counter
(See “Modes of Operation” on page
(1)
WGM
n2:0 definitions. However, the functionality and
0xFFFF
0x00FF
0x01FF
0x03FF
OCRnA
0x00FF
0x01FF
0x03FF
ICRn
OCRnA
ICRn
OCRnA
ICRn
ICRn
OCRnA
TOP
BOTTOM
Immediate
TOP
TOP
TOP
Immediate
BOTTOM
BOTTOM
BOTTOM
BOTTOM
TOP
TOP
Immediate
BOTTOM
BOTTOM
OCRn
Update of
ATmega128
x
at
124.)
MAX
BOTTOM
BOTTOM
BOTTOM
MAX
TOP
TOP
TOP
BOTTOM
BOTTOM
BOTTOM
BOTTOM
MAX
TOP
TOP
TOVn Flag
Set on
135

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