ATMEGA128-16AU SL383 Atmel, ATMEGA128-16AU SL383 Datasheet - Page 323

• Manufacturer Part Number: ATMEGA128-16AU SL383
• Manufacturer: Atmel

SPI Timing
Characteristics
2467S–AVR–07/09
Figure 154. Two-wire Serial Bus Timing
See
Table 134. SPI Timing Parameters
Note:
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Figure 155
SCL
SDA
5. This requirement applies to all ATmega128 Two-wire Serial Interface operation. Other devices
6. The actual low period generated by the ATmega128 Two-wire Serial Interface is (1/f
7. The actual low period generated by the ATmega128 Two-wire Serial Interface is (1/f
1. In SPI Programming mode the minimum SCK high/low period is:
SS high to tri-state
SCK to out high
connected to the Two-wire Serial Bus need only obey the general f
thus f
100 kHz.
thus the low time requirement will not be strictly met for f
ATmega128 devices connected to the bus may communicate at full speed (400 kHz) with other
ATmega128 devices, as well as any other device with a proper t
SCK to SS high
- 2 t
- 3 t
t
SCK high/low
SS low to SCK
SU;STA
SCK high/low
Rise/Fall time
Rise/Fall time
SS low to out
Description
SCK period
Out to SCK
SCK period
SCK to out
SCK to out
CLCL
CLCL
Setup
Setup
and
Hold
Hold
CK
for f
for f
must be greater than 6 MHz for the low time requirement to be strictly met at f
Figure 156
CK
CK
(1)
< 12 MHz
>12 MHz
t
HD;STA
t
of
t
LOW
for details.
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
t
HIGH
t
HD;DAT
4 • t
2 • t
2 • t
Min
10
10
20
ck
ck
ck
t
LOW
t
SU;DAT
50% duty cycle
See
0.5 • t
Table 72
Typ
3.6
10
10
10
10
15
15
10
SCL
sck
> 308 kHz when f
LOW
SCL
acceptance margin.
ATmega128
t
SU;STO
Max
1.6
requirement.
t
r
CK
ns
µs
ns
= 8 MHz. Still,
SCL
SCL
t
BUF
- 2/f
- 2/f
SCL
323
CK
CK
),
),
=