ZL50010/GDC ZARLINK [Zarlink Semiconductor Inc], ZL50010/GDC Datasheet - Page 75

• Manufacturer Part Number: ZL50010/GDC
• Description: Flexible 512 Channel DX with Enhanced DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

AC Electrical Characteristics - Input and Output Frame Boundary Alignment
1
2
Input and Output Frame Offset in
DPLL Master Mode
Input and Output Frame Offset in
DPLL Bypass Mode
(16.384 MHz)
CKo2 or FPo1
CKo1 or CKo0
FPo2 or FPo1
Input Frame Boundary
(4.096 MHz)
FPo1 or FPo0
(8.192 MHz)
(16.384 MHz)
(32.768 MHz)
(4.096 MHz)
(8.192 MHz)
CKo2
CKo0
CKi
CKi
FPo2
CKi
FPo0
FPi
FPi
FPi
Characteristic
Figure 40 - Input and Output Frame Boundary Offset
t
FBOS
Zarlink Semiconductor Inc.
t FBOS
t FBOS
Sym.
Output Frame Boundary
ZL50010
75
Min.
-20
1
Typ
Max.
18
0
Units
ns
ns
Input reference is internal
8 kHz derived from FPi
and CKi.
Measured when there is
no jitter on the CKi and
FPi inputs.
Measured when there is
no jitter on the CKi and
FPi inputs.
Notes
Data Sheet