ZL50010/GDC ZARLINK [Zarlink Semiconductor Inc], ZL50010/GDC Datasheet - Page 69

• Manufacturer Part Number: ZL50010/GDC
• Description: Flexible 512 Channel DX with Enhanced DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

9.0
When the CMM bit (Bit0) is zero, the connection is in normal switching mode. When the CMM bit is one, the
connection memory is in special transmission mode.
Connection Memory Bit Assignment
10 - 3
11 - 8
2 - 1
7 - 1
Bit
Bit
11
0
0
SSA3
11
11
0
CMM=0
SSA3-0
SCA6-0
MSG7-0
PCC1-0
CMM=1
Unused
Table 35 - Connection Memory Bits Assignment when the CMM bit = 1
Name
Name
Table 34 - Connection Memory Bit Assignment when the CMM bit = 0
MSG7
SSA2
10
10
MSG6
SSA1
Source Stream Address.
The binary value of these 4 bits represents the input stream number.
Source Channel Address.
The binary value of these 7 bits represents the input channel number.
Connection Memory Mode = 0.
If this bit is set low, the connection memory is in normal switching mode. Bit 1
to 11 represent the source stream number and channel number.
Reserved.
Message Data Bits: 8 bit data for the message mode.
Per-Channel Control Bits: These two bits control outputs.
Connection Memory Mode = 1. If this bit is set high, the connection memory
is in the per-channel control mode which is per-channel tristate, per-channel
message mode or per-channel BER mode.
9
9
MSG5
SSA0
8
8
MSG4
SCA6
7
7
Zarlink Semiconductor Inc.
PCC
0
0
1
1
MSG3
ZL50010
SCA5
6
6
PCC0
69
0
1
0
1
MSG2
SCA4
5
5
Description
Description
MSG1
SCA3
Per Channel Tristate
4
4
BER Test Mode
Message Mode
Reserved
Output
MSG0
SCA2
3
3
PCC1
SCA1
2
2
PCC0
SCA0
1
1
CMM
CMM
=0
=1
0
0
Data Sheet