UPD17073 NEC, UPD17073 Datasheet - Page 73

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UPD17073

Manufacturer Part Number
UPD17073
Description
4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
Manufacturer
NEC
Datasheet

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11.6 Accepting Interrupt
11.6.1 Interrupt accepting operation and priority
the interrupt request, through an AND circuit, as shown in Figure 11-1.
“0”, and a vector address corresponding to the interrupt is output.
transmitted to the next stage. When two or more interrupt request have generated at the same time, therefore, the
interrupts are accepted according to the following priority:
Therefore, by clearing the interrupt enable flag to “0”, an interrupt with a high hardware priority can be disabled.
(1) Each peripheral hardware issues an interrupt request signal to an interrupt request block when a certain
(2) Each interrupt request block sets the corresponding interrupt request flag (e.g., IRQ flag for the INT pin) to
(3) When the interrupt request flag is set, the interrupt request block whose interrupt enable flag (e.g., IP flag for
(4) The signal output by the interrupt request block is ORed with the output of the interrupt enable flip-flop and
An interrupt is accepted in the following sequence:
When the interrupt has been accepted, the output of the interrupt enable flip-flop is input to the block that has issued
The signal input to the block that has issued the interrupt request clears the interrupt request flag of that block to
If any of the blocks that have issued an interrupt request outputs “1” at this time, the interrupt accept signal is not
INT pin > basic timer 1 > serial interface
The interrupt corresponding to an interrupt source is not accepted unless the interrupt enable flag is set to “1”.
condition is satisfied (for example, when a falling signal has been input to the INT pin).
“1” when it has received an interrupt request signal from peripheral hardware.
IRQ flag) is set to “1” outputs “1”.
an interrupt accept signal is output.
This interrupt enable flip-flop can be set to “1” by the EI instruction and reset to “0” by the DI instruction.
When “1” is output from an interrupt request block with the interrupt enable flip-flop set to “1”, the interrupt
enable flip-flop outputs “1” and the interrupt is accepted.
PD17072,17073
73

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