UPD17073 NEC, UPD17073 Datasheet - Page 65
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UPD17073
Manufacturer Part Number
UPD17073
Description
4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
Manufacturer
NEC
Datasheet
1.UPD17073.pdf
(226 pages)
- Current page: 65 of 226
- Download datasheet (2Mb)
10.4 General-Purpose Output Ports (P0A, P1B, P1C)
10.4.1 Configuration of output ports
10.4.2 Using output port
(such as MOV instruction).
written when the low level is output.
read.
10.4.3 Reset status of output port
(1) On power-ON reset
(2) On CE reset
(3) On execution of clock stop instruction
(4) In halt status
The configurations of the output ports are shown below.
The output port outputs the contents of the output latch from its pins.
The output data is set by executing an instruction that writes data to the port register corresponding to each pin
“1” is written to each bit of the port register when the high level is output to the corresponding port pin, and “0” is
If a read instruction (such as SKT instruction) is executed to the port register, the contents of the output latch are
P0A (P0A3, P0A2, P0A1, P0A0)
P1B (P1B3, P1B2, P1B1, P1B0)
P1C (P1C0)
All the pins output the contents of the output latch.
The contents of the output latch become 0.
Retains the contents of the output latch.
The contents of the output latch are retained; therefore, the output data is not changed on CE reset.
Retains the contents of the output latch.
The contents of the output latch are retained; therefore, the output data is not changed on execution of the
clock stop instruction.
Initialize the port through program as necessary.
The contents of the output latch are output.
The contents of the output latch are retained; therefore, the output data is not changed in the halt status.
V
DD
Output
latch
Write instruction
Read instruction
Port register
(1 bit)
PD17072,17073
65
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