UPD17073 NEC, UPD17073 Datasheet - Page 34

• Manufacturer Part Number: UPD17073
• Description: 4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
• Manufacturer: NEC

5.2.2 Functions of address register
@AR”), stack manipulation instruction (“PUSH AR” or “POP AR”), indirect branch instruction (“BR @AR”), and indirect
subroutine call instruction (“CALL @AR”) has been executed.
instructions has been executed.
5.2.3 Address register and data buffer
34
(1) Table reference instruction (“MOVT DBF, @AR”)
(2) Stack manipulation instruction (“PUSH AR”, “POP AR”)
(3) Indirect branch instruction (“BR @AR”)
(4) Indirect subroutine call instruction (“CALL @AR”)
(5) Address register increment instruction (“INC AR”)
The address register specifies a program memory address when the table reference instruction (“MOVT DBF,
A dedicated instruction (“INC AR”) that can increment the value of the address register by one is available.
The following paragraphs (1) through (5) describe the operations of the address register when each of these
The address register can transfer data through the data buffer as a part of the peripheral hardware.
For details, refer to 9. DATA BUFFER (DBF).
When the “MOVT DBF, @AR” instruction is executed, the constant data (16 bits) of the program memory
address specified by the contents of the address register are read to the data buffer.
The addresses of the constant data which can be specified by the address register are 0000H-0FFFH.
By executing the “PUSH AR” instruction, the stack pointer is decremented by one and the contents of the
address register (AR) are stored to the address stack register specified by the stack pointer.
When the “POP AR” instruction is executed, the contents of the address stack register specified by the stack
pointer are transferred to the address register, and the stack pointer is incremented by one.
When the “BR @AR” instruction is executed, the program execution branches to a program memory address
specified by the contents of the address register.
The branch addresses that can be specified by the address register are 0000H-0FFFH.
When the “CALL @AR” instruction is executed, the subroutine at the program memory address specified by
the contents of the address register can be called.
The first addresses of the subroutine that can be specified by the address register are 0000H-0FFFH.
This instruction increments the contents of the address register by one each time it is executed.
Since the address register is configured of 12 bits, its contents become “0000H” when the “INC AR” instruction
is executed with the contents of the address register being “0FFFH”.
PD17072,17073