UPD17073 NEC, UPD17073 Datasheet - Page 185

• Manufacturer Part Number: UPD17073
• Description: 4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
• Manufacturer: NEC

19.6 Device Control Function by CE Pin
source:
19.6.1 Controlling operation of PLL frequency synthesizer
19.6.2 Making clock stop instruction valid or invalid
19.6.3 Resetting device
(1) PLL frequency synthesizer
(2) Making clock stop instruction valid or invalid
(3) Resets device
The CE pin has the following functions by using the input level and rising edge of a signal input from an external
The PLL frequency synthesizer can operate only when the CE pin is high.
When the CE pin is low, PLL is automatically disabled.
When PLL is disabled, the VCOH and VCOL pins are floated, and the EO pin is also floated.
The PLL frequency synthesizer can also be disabled through program even when the CE pin is high.
The clock stop instruction (“STOP s”) is valid only when the CE pin is low.
The clock stop instruction executed when the CE pin is high is treated as an NOP (no operation) instruction.
The device can be reset by raising the CE pin (CE reset).
The device can also be reset by turning off supply voltage V
For details, refer to 20. RESET.
DD
(power-ON reset).
PD17072,17073
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