UPD17073 NEC, UPD17073 Datasheet - Page 174
![no-image](/images/manufacturer_photos/0/4/470/nec_sml.jpg)
UPD17073
Manufacturer Part Number
UPD17073
Description
4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
Manufacturer
NEC
Datasheet
1.UPD17073.pdf
(226 pages)
- Current page: 174 of 226
- Download datasheet (2Mb)
is executed, and processing A is executed when an interrupt by INT pin has been accepted.
halt mode, processing A of INT pin, which is assigned the higher hardware priority, is executed.
in
and processing B is executed.
174
<1>
In this example, the halt mode is released when an interrupt by basic timer 1 has been accepted, processing B
Each time the halt mode is released, processing C is executed.
If the interrupt request by INT pin and interrupt request by basic timer 1 are issued exactly at the same time in the
When “RETI” is executed after execution of processing A, the execution is returned to the “BR LOOP” instruction
If the “RETI” instruction is executed after processing B, the “BR LOOP” instruction is executed.
Example 1. Example of program when EI instruction is executed
. However, the “BR LOOP” instruction is not executed, but the basic timer 1 interrupt is accepted immediately,
HLTINT
INTTM
INTPIN
START:
ORG
ORG
INTTIMER:
EI_RETI:
MAIN:
LOOP:
;
<1>
DAT
DAT
DAT
BR
INTTM
BR
INTPIN
BR
EI
RETI
BANK1
SET2
SET1
EI
HALT
BR
Processing A
Processing B
Processing C
MAIN
INTTIMER
EI_RETI
IPBTM, IP
BTM1CK
HLTINT
1000B
0002H
0003H
LOOP
; Symbol definition for halt mode
; Defines symbol of interrupt vector address
; Defines symbol of interrupt vector address
; Program address 0000H
; Basic timer 1 interrupt vector address
; Interrupt service by INT pin
; Interrupt service by basic timer 1
; Embedded macro
; Sets time interval of basic timer 1 to 8 ms
; Main routine processing
; Enables all interrupts
; Sets releasing halt mode by interrupt
PD17072,17073
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