UPD17073 NEC, UPD17073 Datasheet - Page 187
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UPD17073
Manufacturer Part Number
UPD17073
Description
4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
Manufacturer
NEC
Datasheet
1.UPD17073.pdf
(226 pages)
- Current page: 187 of 226
- Download datasheet (2Mb)
19.7 Low-Speed Mode Function
register. This function is called a low-speed mode function.
executed immediately after the SYSCK flag has been set to “1” takes 103.3 s.
normal operation.
19.7.1 Releasing low-speed mode
to the SYSCK flag.
execution time: 53.3 s). However, the instruction that is executed immediately after the SYSCK flag has been reset
to “0” takes 56.6 s.
The PD17073 can slow down the CPU clock when “1” is written to the SYSCK flag of the system clock select
The time required to execute one instruction in the low-speed mode is 106.6 s. However, the instruction that is
By slowing down the CPU clock, the current consumption of the device can be lowered as compared with that during
Figure 19-7 shows the configuration and function of the system clock select register.
The low-speed mode is released when the SYSCK flag is reset to “0” by power-ON reset, or when “0” is written
After the low-speed mode has been released, the CPU clock returns to the normal operation speed (one instruction
Remark R: Retained
reset
System clock select
register
At
Power-ON
Clock stop
CE
Name
Figure 19-7. Configuration of System Clock Select Register
b
0
0
3
Flag symbol
b
0
0
2
b
0
0
1
b
S
Y
S
C
K
R
R
0
1
0
0
53.3 s
106.6 s
Fixed to “0”
(BANK1)
Address
55H
Selects system clock (one instruction execution time)
Read/
Write
R/W
PD17072,17073
187
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