UPD17073 NEC, UPD17073 Datasheet - Page 189
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UPD17073
Manufacturer Part Number
UPD17073
Description
4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
Manufacturer
NEC
Datasheet
1.UPD17073.pdf
(226 pages)
- Current page: 189 of 226
- Download datasheet (2Mb)
20.2 Reset Function
when the CE pin goes high from low.
register, and execute the program from address 0000H.
and execute the program from address 0000H.
to be initialized, and the operation of the power failure detector circuit, which is to be described in 20.6.
the reset control circuit shown in Figure 20-1.
been executed.
Internal reset signal
The power-ON reset is effected when supply voltage V
The power-ON reset is to initialize the program counter, stack, system register, basic timer 0 carry FF and control
The CE reset is to initialize part of the program counter, stack, system register, and peripheral control register,
The main differences between the power-ON reset and CE reset are the contents of the peripheral control register
The power-ON reset and CE reset are controlled by the reset signals IRES, RES, and RESET that are output from
Table 20-1 shows the relations among the IRES, RES, and RESET signals, power-ON reset, and CE reset.
The reset control circuit also operates when the clock stop instruction (STOP s) described in 19. STANDBY has
The following 20.3 and 20.4 respectively describe the CE reset and power-ON reset.
20.5 describes the relations between the CE reset and power-ON reset.
RESET
IRES
RES
Table 20-1. Relations between Internal Reset Signal and Each Reset
At CE reset
Output signal
At power-
ON reset
At clock stop
DD
has risen from a specific level, and the CE reset is effected
Forcibly sets device in halt status, which is
released by setting basic timer 0 carry FF.
Initializes part of peripheral control register
Initializes part of program counter, stack, system
register, and peripheral control register.
Contents controlled by each reset signal
PD17072,17073
189
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