UPD17073 NEC, UPD17073 Datasheet - Page 134
UPD17073
Manufacturer Part Number
UPD17073
Description
4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
Manufacturer
NEC
Datasheet
1.UPD17073.pdf
(226 pages)
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134
Remark When the PLL reference frequency select register is set to “PLL disable” status, the VCOH and
reset
At
PLL reference frequency
select register
Power-ON
Clock stop
CE reset
Figure 15-7. Configuration of PLL Reference Frequency Select Register
Name
VCOL pins are floated. The EO pin is floated.
b
0
0
3
Flag symbol
b
K
P
L
L
R
F
C
0
0
0
0
1
1
1
1
0
0
2
2
Retained
b
R
C
K
P
L
L
F
1
0
0
1
1
0
0
1
1
0
0
1
b
K
P
L
L
R
F
C
0
0
1
0
1
0
1
0
1
0
0
0
Sets reference frequency f
1 kHz
3 kHz
5 kHz
6.25 kHz
12.5 kHz
25 kHz
PLL disable
PLL disable
(BANK1)
Address
66H
Read/
Write
R/W
r
of PLL frequency synthesizer
PD17072,17073
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