HD64336901G Renesas Technology, HD64336901G Datasheet - Page 77
HD64336901G
Manufacturer Part Number
HD64336901G
Description
(HD64xxx Series) 16-BIT MICROCONTROLLER
Manufacturer
Renesas Technology
Datasheet
1.HD64336901G.pdf
(408 pages)
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3.2.4
IENR2 enables timer B1 interrupts.
When disabling interrupts by clearing bits in an interrupt enable register, or when clearing bits in
an interrupt flag register, always do so while interrupts are masked (I = 1). If the above clear
operations are performed while I = 0, and as a result a conflict arises between the clear instruction
and an interrupt request, exception handling for the interrupt will be executed after the clear
instruction has been executed.
Bit
7
6
5
4 to 0
Interrupt Enable Register 2 (IENR2)
Bit Name
IENTB1
Initial
Value
0
0
All 1
0
R/W
R/W
R/W
Description
Reserved
This bit is always read as 0.
Reserved
Although this bit is readable/writable, it should not be set
to 1.
Timer B1 Interrupt Enable
When this bit is set to 1, overflow interrupt requests of
timer B1 are enabled.
Reserved
These bits are always read as 1.
Rev. 1.00, 11/03, page 49 of 376
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