HD64336901G Renesas Technology, HD64336901G Datasheet - Page 100

• Manufacturer Part Number: HD64336901G
• Description: (HD64xxx Series) 16-BIT MICROCONTROLLER
• Manufacturer: Renesas Technology

5.3.1
The LSI system clock is generated by the internal RC clock after a reset. The internal RC clock is
switched to the external clock by the user software. Figure 5.3 shows the flowchart to switch
clocks with the external oscillator backup function enabled. Figures 5.4 and 5.5 show the
flowcharts to switch clocks with the external oscillator backup function disabled.
Rev. 1.00, 11/03, page 72 of 376
LSI operates on external oscillator
Write 1 to OSCBAKE in CKCSR
Clear CKSWIE in CKCSR to 0
Write 1 to OSCSEL in CKCSR
Write 1 to CKSWIE in CKCSR
Write 1 to PMRC0 in CKCSR
Write 1 to PMRC1 in CKCSR
Clock Control Operation
Figure 5.3 Flowchart of Clock Switching with Backup Function Enabled
external clock? (CKSTA in
LSI operates on internal RC clock
Start (reset)
CKCSR is 1)
Switched to
Yes
No
[5]
[6]
[1]
[2]
[3]
[4]
External oscillation
halt is detected
External
oscillation halt
is detected
[1] External oscillation starts when pins PC1 and
[2] The external oscillation halt detection circuit is
[3] An interrupt to switch the internal RC clock to the
[4] After writing 1 to the OSCSEL bit, this LSI waits
[5] While waiting for external oscillation settling, this
[6] If this LSI detects the external oscillation halt, it
PC0 are selected as external oscillation pins.
Write 0 to bit PMRC1 to input the external clock.
enabled when the external oscillation backup
function is enabled. Since this detection circuit
operates on the internal RC clock, do not set the
internal RC oscillator to standby mode by using
the RCSTP bit in RCCR.
external clock is enabled.
until the oscillation of the external oscillator
settles. The correspondence between Nwait,
which is the number of wait cycles for oscillation
settling, and Nstby, which is the number of wait
cycles for oscillation settling when returning from
standby mode, is as follows:
Nstby
Nstby is set by bits STS[2:0] in SYSCR1.
For details, see section 6.1.1, System Control
Register 1 (SYSCR1).
LSI is not halted but continues to operate on the
internal RC clock. Read the CKSTA bit in
CKCSR to ensure whether or not clocks are
switched. When the oscillation settles, this LSI
switches the system clock to the external clock.
If the external oscillation is in a halted state, then
set the clock switch interrupt request flag.
switches the system clock to the internal clock,
and sets the clock switch interrupt request flag.
Nwait
2
Nstby
Exceptional handling
for clock switching
LSI operates on
internal RC clock