HD64336901G Renesas Technology, HD64336901G Datasheet - Page 300

• Manufacturer Part Number: HD64336901G
• Description: (HD64xxx Series) 16-BIT MICROCONTROLLER
• Manufacturer: Renesas Technology

17.3
17.3.1
Figure 17.3 shows the timing of the operation of the power-on reset circuit. As the power-supply
voltage rises, the capacitor which is externally connected to the RES pin is gradually charged via
the internal pull-up resistor (Typ. 150 k ). While the RES signal is driven low, the prescaler S and
the entire chip retains the reset state. When the level on the RES signal reaches the specified value,
the prescaler S is released from its reset state and it starts counting. The OVF signal is generated to
release the internal reset signal after the prescaler S has counted 131,072 cycles of the clock. The
noise filter circuit which removes noise with less than 400 ns (Typ.) is included to prevent the
incorrect operation of this LSI caused by noise on the RES signal.
To achieve stable operation of this LSI, the power supply needs to rise to its full level and settles
within the specified time. The maximum time required for the power supply to rise and settle
(t
RES pin (C
the power supply, the power supply circuit should be designed to satisfy the following formula.
Note that the power supply voltage (Vcc) must fall below Vpor = 100 mV to remove charge on the
RES pin. After that, it can be risen. To remove charge on the RES pin, it is recommended that the
diode should be placed to Vcc. If the power supply voltage (Vcc) rises from the point above Vpor,
a power-on reset may not occur.
Rev. 1.00, 11/03, page 272 of 376
PWON
Vcc
PSS-reset
signal
OVF
Internal reset
signal
) is determined by the oscillation frequency (f
Power-On Reset Circuit
t
PWON
Operations
RES
Vpor
(t
). Where t
PWON
(ms)
t
PWON
Figure 17.3 Operational Timing of Power-On Reset Circuit
PSS counter starts
90
3000 ms, C
PWON
C
RES
is assumed to be the time required to reach 90
131,072 cycles
( F)
RES
162/f
0.22 F, and f
Reset released
OSC
(MHz)
OSC
OSC
) and capacitance which is connected to
= 10 in 2-MHz to 10-MHz operation)
of the full level of
Vss
Vss