HD64336901G Renesas Technology, HD64336901G Datasheet - Page 277

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HD64336901G

Manufacturer Part Number
HD64336901G
Description
(HD64xxx Series) 16-BIT MICROCONTROLLER
Manufacturer
Renesas Technology
Datasheet
15.4.8
Flowcharts in respective modes that use the I
No
No
No
Write transmit data in ICDRT
Write transmit data in ICDRT
No
No
No
Read ACKBR in ICIER
Read BBSY in ICCR2
Set MST to 1 and TRS
Read TEND in ICSR
Read TDRE in ICSR
Read TEND in ICSR
Clear TEND in ICSR
Clear STOP in ICSR
Read STOP in ICSR
Clear TDRE in ICSR
Write transmit data
Set MST and TRS
Write 1 to BBSY
Write 0 to BBSY
in ICCR1 to 1.
and 0 to SCP.
to 0 in ICCR1
ACKBR=0 ?
Example of Use
BBSY=0 ?
TDRE=1 ?
Last byte?
TEND=1 ?
STOP=1 ?
TEND=1 ?
in ICDRT
and SCP
Initialize
Transmit
mode?
Start
End
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Figure 15.17 Sample Flowchart for Master Transmit Mode
No
No
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
Mater receive mode
[1] Test the status of the SCL and SDA lines.
[2] Set master transmit mode.
[3] Issue the start candition.
[4] Set the first byte (slave address + R/ ) of transmit data.
[5] Wait for 1 byte to be transmitted.
[6] Test the acknowledge transferred from the specified slave device.
[7] Set the second and subsequent bytes (except for the final byte) of transmit data.
[8] Wait for ICDRT empty.
[9] Set the last byte of transmit data.
[10] Wait for last byte to be transmitted.
[11] Clear the TEND flag.
[12] Clear the STOP flag.
[13] Issue the stop condition.
[14] Wait for the creation of stop condition.
[15] Set slave receive mode. Clear TDRE.
2
C bus interface are shown in figures 15.17 to 15.20.
Rev. 1.00, 11/03, page 249 of 376

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