HD64336901G Renesas Technology, HD64336901G Datasheet - Page 287

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HD64336901G

Manufacturer Part Number
HD64336901G
Description
(HD64xxx Series) 16-BIT MICROCONTROLLER
Manufacturer
Renesas Technology
Datasheet
16.3.3
ADCR enables A/D conversion started by an external trigger signal.
Bit
3
2
1
0
Bit
7
6 to 4
3, 2
Bit Name
CKS
CH2
CH1
CH0
Bit Name
TRGE
A/D Control Register (ADCR)
Initial
Value
0
0
0
0
Initial
Value
0
All 1
All 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Clock Select
Selects the A/D conversions time
0: Conversion time = 134 states (max.)
1: Conversion time = 70 states (max.)
Clear the ADST bit to 0 before switching the conversion
time.
Channel Select 0 to 2
Select analog input channels.
When SCAN = 0
000: AN0
001: AN1
010: AN2
011: AN3
Note: When executing the A/D conversion through AN3
Description
Trigger Enable
A/D conversion is started at the falling edge and the rising
edge of the external trigger signal (ADTRG) when this bit
is set to 1.
The selection between the falling edge and rising edge of
the external trigger pin (ADTRG) conforms to the WPEG5
bit in the interrupt edge select register 2 (IEGR2)
Reserved
These bits are always read as 1.
Reserved
Although these bits are readable/writable, they should not
be set to 1.
or AN2, do not set the VDDII bit in LVDCR to 0. If 0
is set, the A/D conversion accuracy is not
guaranteed.
Rev. 1.00, 11/03, page 259 of 376
When SCAN = 1
000: AN0
001: AN0 to AN1
010: AN0 to AN2
011: AN0 to AN3

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