TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 91

• Manufacturer Part Number: TSC80251
• Manufacturer: TEMIC [TEMIC Semiconductors]

TSC80251
ANL <dest>,<src>
Function:
Logical–AND
Description:
Performs the bitwise logical–AND ( ) operation between the specified variables and stores the results in the
destination variable.
The two operands allow 10 addressing mode combinations. When the destination is the register or accumulator, the
source can use register, direct, register–indirect or immediate addressing; when the destination is a direct address, the
source can be the accumulator or immediate data.
Note :
When this instruction is used to modify an output Port, the value used as the original Port data is read from the output data latch, not the input
pins.
Example :
Register 1 contains 0C3h (11000011B) and register 0 contains 55h (01010101B). After executing the instruction ANL
R1, R0 register 1 contains 41h (01000001B).
When the destination is a directly addressed byte, this instruction clears combinations of bits in any RAM location or
hardware register. The mask byte determining the pattern of bits to be cleared would either be an immediate constant
contained in the instruction or a value computed in the register or accumulator at run time. The instruction ANL
P1,#01110011B clears bits 7, 3, and 2 of output Port 1.
ANL dir8,A
[Encoding]
ANL dir8,#data
[Encoding]
5.46
FLAGS :
Hex Code in:
Binary Mode = [Encoding]
Source Mode = [Encoding]
5 3
5 2
CY
_
addr7–addr0
addr7–addr0
AC
_
immed data
OV
_
Operation:
ANL
(dir8)
(dir8)
(A)
N
Rev. C – May 7, 1999
Z