TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 28

no-image

TSC80251

Manufacturer Part Number
TSC80251
Description
Manufacturer
TEMIC [TEMIC Semiconductors]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TSC80251G1D-16CB
Manufacturer:
TEXAS
Quantity:
769
Part Number:
TSC80251G1D-16CB
Manufacturer:
TEMIC
Quantity:
20 000
Part Number:
TSC80251G1D-16CB-E
Manufacturer:
TEMIC
Quantity:
20 000
Part Number:
TSC80251G1D-16I
Quantity:
16
Part Number:
TSC80251G1D-24CB
Manufacturer:
TEMIC
Quantity:
999
Part Number:
TSC80251G2D-16CB
Manufacturer:
TEMIC
Quantity:
1 715
Part Number:
TSC80251G2D-16CB
Manufacturer:
TEMIC
Quantity:
3 244
Part Number:
TSC80251G2D-16CB
Manufacturer:
ATMEL
Quantity:
3 442
Part Number:
TSC80251G2D-16CB
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
TSC80251G2D-16CBR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
TSC80251G2D-24CB
Manufacturer:
ATMEL
Quantity:
3 443
Part Number:
TSC80251G2D-24CB
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
TSC80251G2D-24CB
Manufacturer:
TEMIC
Quantity:
20 000
Rev. C – May 7, 1999
4.2.1. Data Types
Table 4.2. lists the data types that are addressed by the instruction set. Words or dwords (double words) can be stored
in memory starting at any byte address; alignment on two–byte or four–byte boundaries is not required. Words and
dwords are stored in memory and the register file in big endian form.
4.2.1.1. Order of Byte Storage for Words and Double Words
TSC80251 microcontrollers store words (2 bytes) and double words (4 bytes) in memory and in the register file in big
endian form. In memory storage, the most significant byte (MSB) of the word or double word is stored in the memory
byte specified in the instruction; the remaining bytes are stored at higher addresses, with the least significant byte (LSB)
at the highest address. Words and double words can be stored in memory starting at any byte address. In the register
file, the MSB is stored in the lowest byte of the register specified in the instruction. The code fragment in
Figure 4.3. illustrates the storage of words and double words in big endian form.
4.2.2. Register Notations
In register–addressing instructions, specific indices denote the registers that can be used in that instruction. For
example, the instruction ADD A,Rn uses“Rn” to denote any one of R0, R1, ..., R7; i.e., the range of n is 0-7. The
instruction ADD Rm,#data uses “Rm” to denote R0, R1, ..., R15; i.e., the range of m is 0-15. Table 4.3. summarizes
the notation used for the register indices. When an instruction contains two registers of the same type (e.g., MOV
Rmd,Rms) the first index “d” denotes “destination” and the second index “s” denotes “source”.
4.2.3. Address Notations
In the C251 Architecture, memory addresses include a region number (00:, 01:, ..., FF:). SFR addresses have a prefix
“S:” (S:000h-S:1FFh). The distinction between memory addresses and SFR addresses is necessary, because memory
locations 00:0000h-00:01FFh and SFR locations S:000h-S:1FFh can both be directly addressed in an instruction.
A3h
200h
Figure 4.3. Word and Double-word Storage in Big Endian Form
0
Contents of register file and memory after execution: MOV WR0, #A3B6h
WR0
A3h
B6h
201h
1
B6h
202h
2
Bit
Byte
Word
Dword (Double Word)
203h
3
Data Type
Table 4.2. Data Types
00h
4
00h
5
DR4
Number of Bits
C4h
6
MOV 00:0201h, WR0
MOV DR4, #0000C4D7h
16
32
1
8
D7h
7
TSC80251
4.3

Related parts for TSC80251