TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 38

• Manufacturer Part Number: TSC80251
• Manufacturer: TEMIC [TEMIC Semiconductors]

Rev. C – May 7, 1999
4.6.3. Unconditional Jumps
There are five unconditional jumps. NOP and SJMP jump to addresses relative to the program counter. AJMP, LJMP,
and EJMP jump to direct or indirect addresses.
4.6.4. Calls and Returns
The C251 Architecture provides relative, direct, and indirect calls and returns.
The TRAP instruction which caues an interrupt call is useful for the development of emulations of an TSC80251
microcontroller.
NOP (No Operation) is an unconditional jump to the next instruction.
SJMP (Short Jump) jumps to any instruction within –128 to 127 of the next instruction.
AJMP (Absolute Jump) changes the lowest 11 bits of the PC to jump anywhere within the current 2–Kbyte block
of memory. The address can be direct or indirect.
LJMP (Long Jump) changes the lowest 16 bits of the PC to jump anywhere within the current 64–Kbyte region.
EJMP (Extended Jump) changes all 24 bits of the PC to jump anywhere in the 16–Mbyte address space. The address
can be direct or indirect.
ACALL (Absolute Call) pushes the lower 16 bits of the next instruction address onto the stack and then changes
the lower 11 bits of the PC to the 11–bit address specified by the instruction. The call is to an address that is in the
same 2–Kbyte block of memory as the address of the next instruction.
LCALL (Long Call) pushes the lower 16 bits of the next–instruction address onto the stack and then changes the
lower 16 bits of the PC to the 16–bit address specified by the instruction. The call is to an address in the same
64–Kbyte block of memory as the address of the next instruction.
ECALL (Extended Call) pushes the 24 bits of the next instruction address onto the stack and then changes the 24
bits of the PC to the 24–bit address specified by the instruction. The call is to an address anywhere in the 16–Mbyte
memory space.
RET (Return) pops the top two bytes from the stack to return to the instruction following a subroutine call. The
return address must be in the same 64–Kbyte region.
ERET (Extended Return) pops the top three bytes from the stack to return to the address following a subroutine
call. The return address can be anywhere in the 16–Mbyte address space.
RETI (Return from Interrupt) provides a return from an interrupt service routine. The operation of RETI depends
on the INTR bit in the CONFIG1 configuration byte (See Product Design Guide):
For INTR = 0, an interrupt pushes the two lower bytes of the PC onto the stack in the following order : PC.7:0,
PC.15:8. The RETI instruction pops these two bytes and uses them as the 16–bit return address in region FF:.
RETI also restores the interrupt logic to accept additional interrupts at the same priority level as the one just
processed.
For INTR = 1, an interrupt pushes the three PC bytes and PSW1 onto the stack in the following order: PSW1,
PC.23:16, PC.7:0, PC.15:8. The RETI instruction pops these four bytes and then returns to the specified 24–bit
address, which can be anywhere in the 16–Mbyte address space. RETI also clears the interrupt request line. (See
the note in Table 4.10. regarding compatibility with code written for 80C51 microcontrollers.)
TSC80251
4.13