TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 44
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TSC80251
Manufacturer Part Number
TSC80251
Description
Manufacturer
TEMIC [TEMIC Semiconductors]
Datasheet
1.TSC80251.pdf
(219 pages)
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Rev. C – May 7, 1999
PSW (S:D0h)
Program Status Word register
Reset Value = 0000 0000b
Number
CY
Bit
7
6
5
4
3
2
1
0
7
Mnemonic
RS1
RS0
OV
UD
CY
AC
Bit
FO
AC
P
6
Figure 4.7. Program Status Word register (PSW)
Carry flag
Auxiliary Carry flag
Flag 0
Register Bank Select bit 1
Register Bank Select bit 0
Overflow flag
User-definable flag
Parity bit
The carry flag is set by an addition (ADD, ADDC) if there is a carry out of the MSB.
It is set by a subtraction (SUB, SUBB) or compare (CMP) if a borrow is needed for
the MSB. The carry flag is also affected by some rotate and shift instructions, logical
bit instructions and bit move instructions, and the multiply (MUL) and decimal
adjust (DA) instructions (See Table 4.4. ).
The auxiliary flag is affected only by instructions that address 8-bit operands. The
AC flag is set if an arithmetic instruction with an 8-bit operand produces a carry out
of bit 3 (from addition) or a borrow into bit 3 (from subtraction). Otherwise it is
cleared. This flag is useful for BCD arithmetic (See Table 4.4. ).
This general-purpose flag is available to the user.
This bit selects the memory locations that comprise the active bank of the register
file (registers R0-R7).
RS1
0
0
1
1
This bit selects the memory locations that comprise the active bank of the register
file (registers R0-R7).
RS0
0
1
0
1
This bit is set if an addition or subtraction of signed variables results in an overflow
error (i.e., if the magnitude of the sum or differnecce is too great for the seven LSBs
in 2’s-complement representation). The overflow flag is also set if a multiplication
product overflows one byte or if a division by zero is attempted.
This general-purpose flag is available to the user.
This bit indicates the parity of the accumulator. It is set if an odd number of bits in
the accumulator are set. Otherwise, it is cleared. Not all instructions update the
parity bit.
FO
5
Bank
0
1
2
3
Bank
0
1
2
3
RS1
4
Address
00h-07h
08h-0Fh
10h-17h
18h-1Fh
Address
00h-07h
08h-0Fh
10h-17h
18h-1Fh
RS0
3
Description
OV
2
TSC80251
UD
1
P
0
4.19