TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 190

• Manufacturer Part Number: TSC80251
• Manufacturer: TEMIC [TEMIC Semiconductors]

Rev. C – May 7, 1999
RETI
Function:
Return from interrupt
Description:
This instruction pops two or four bytes from the stack, depending on the INTR bit in the CONFIG1 register .
If INTR = 0, RETI pops the high and low bytes of the PC successively from the stack and uses them as the 16–bit return
address in region FF:.The stack pointer is decremented by two. No other registers are affected, and neither PSW nor
PSW1 is automatically restored to its pre–interrupt status.
If INTR = 1, RETI pops four bytes from the stack: PSW1 and the three bytes of the PC. The three bytes of the PC are
the return address, which can be anywhere in the 16–Mbyte memory space. The stack pointer is decremented by four.
PSW1 is restored to its pre–interrupt status, but PSW is not restored to its pre–interrupt status. No other registers are
affected.
For either value of INTR, hardware restores the interrupt logic to accept additional interrupts at the same priority level
as the one just processed. Program execution continues at the return address, which normally is the instruction
immediately after the point at which the interrupt request was detected. If an interrupt of the same or lower priority
is pending when the RETI instruction is executed, that one instruction is executed before the pending interrupt is
processed.
Example :
INTR = 0. The stack pointer contains 0Bh. An interrupt was detected during the instruction ending at location 0122h.
On–chip RAM locations 0Ah and 0Bh contain 01h and 23h, respectively. After executing the instruction, RETI the
stack pointer contains 09h and program execution continues at location 0123h.
[Encoding]
FLAGS :
Hex Code in:
Binary Mode = [Encoding]
Source Mode = [Encoding]
0011
CY
_
0010
AC
_
OV
_
Operation:
Operation for INTR = 0 :
RETI
(PC).15:8
(SP)
(PC).7:0
(SP)
Operation for INTR = 1 :
RETI
(PC).15:8
(SP)
(PC).7:0
(SP)
(PC).23:16
(SP)
PSW1
(SP)
(SP) - 1
(SP) - 1
(SP) - 1
(SP) - 1
(SP) - 1
(SP) - 1
((SP))
((SP))
((SP))
((SP))
((SP))
((SP))
N
_
TSC80251
Z
_
5.145