TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 13
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TSC80251
Manufacturer Part Number
TSC80251
Description
Manufacturer
TEMIC [TEMIC Semiconductors]
Datasheet
1.TSC80251.pdf
(219 pages)
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Rev. C – May 7, 1999
Architectural Overview
2.1. Microcontroller Architecture
The TSC80251 family of 8/16–bit microcontrollers is a high performance upgrade of the widely used 80C51
microcontrollers. It extends features and performance while maintaining binary code compatibility, so the impact on
existing hardware and software is minimal.
The C251 Architecture core contains:
Several benefits are derived from these features :
24–bit linear addressing and up to 16 Mbytes of memory
a register file based CPU with registers accessible as bytes, words, and double words
a page mode for accelerating external instruction fetches
an instruction pipeline
an enriched instruction set, including 16–bit arithmetic and logic instructions
a 64–Kbyte extended stack space
a minimum instruction–execution time of two clocks (vs. 12 clocks for 80C51 microcontrollers)
binary–code compatibility with 80C51 microcontrollers
preservation of code written for 80C51 microcontrollers
a significant increase in core execution speed in comparison with 80C51 microcontrollers at the same clock rate
support for larger programs and more data
increased efficiency for code written in C language
TSC80251
2.1