TSC80251 TEMIC [TEMIC Semiconductors], TSC80251 Datasheet - Page 176

• Manufacturer Part Number: TSC80251
• Manufacturer: TEMIC [TEMIC Semiconductors]

Rev. C – May 7, 1999
ORL <dest> <src>
Function:
Logical–OR for byte variables
Description:
Performs the bitwise logical–OR operation (V) between the specified variables, storing the results in the destination
operand.
The destination operand can be a register, an accumulator or direct address.
The two operands allow twelve addressing mode combinations. When the destination is the accumulator, the source
can be register, direct, register–indirect or immediate addressing; when the destination is a direct address, the source
can be the accumulator or immediate data. When the destination is register the source can be register, immediate, direct
and indirect addressing.
Note:
When this instruction is used to modify an output Port, the value used as the original Port data is read from the output data latch, not the input
pins.
Example :
The accumulator contains 0C3h (11000011B) and R0 contains 55h (01010101B). After executing the instruction, ORL
A, R0 the accumulator contains 0D7h (11010111B).
When the destination is a directly addressed byte, the instruction can set combinations of bits in any RAM location
or hardware register. The pattern of bits to be set is determined by a mask byte, which may be a constant data value
in the instruction or a variable computed in the accumulator at run time. After executing the instruction ORL P1,
#00110010B sets bits 5, 4 and 1 of output Port 1.
ORL dir8,A
[Encoding]
ORL dir8,#data
[Encoding]
FLAGS :
Hex Code in:
Binary Mode = [Encoding]
Source Mode = [Encoding]
0100
0100
CY
_
0010
0011
AC
_
addr7-addr0
addr7-addr0
immed data
OV
_
Operation:
ORL
(dir8)
(dir8) V (A)
N
TSC80251
Z
5.131