PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 461

no-image

PIC18F25J50

Manufacturer Part Number
PIC18F25J50
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F25J50-I/SO
Manufacturer:
MICROCHIP
Quantity:
1 001
Part Number:
PIC18F25J50-I/SP
Manufacturer:
MICROCHIP
Quantity:
1 001
Part Number:
PIC18F25J50-I/SS
Manufacturer:
MICROCHIP
Quantity:
1 001
Part Number:
PIC18F25J50T-I/SO
Manufacturer:
MICROCHIP
Quantity:
1 001
Part Number:
PIC18F25J50T-I/SS
Manufacturer:
MICROCHIP
Quantity:
1 001
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2011 Microchip Technology Inc.
Q Cycle Activity:
After Instruction
Decode
W
Q1
=
Move Literal to W
MOVLW k
0  k  255
k  W
None
The eight-bit literal, ‘k’, is loaded into W.
1
1
literal ‘k’
MOVLW
Read
0000
Q2
5Ah
1110
0x5A
Process
Data
Q3
kkkk
Write to
Q4
W
kkkk
PIC18F46J50 FAMILY
MOVWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
REG
W
REG
Q1
=
=
=
=
register ‘f’
Move W to f
MOVWF
0  f  255
a  [0,1]
(W)  f
None
Move data from W to register, ‘f’.
Location ‘f’ can be anywhere in the
256-byte bank.
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f 95 (5Fh). See
Section 28.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode”
1
1
MOVWF
Read
0110
Q2
4Fh
FFh
4Fh
4Fh
REG, 0
f {,a}
111a
Process
Data
Q3
DS39931D-page 461
ffff
for details.
register ‘f’
Write
Q4
ffff

Related parts for PIC18F25J50