PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 169
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PIC18F25J50
Manufacturer Part Number
PIC18F25J50
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F25J50.pdf
(562 pages)
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11.0
The Parallel Master Port module (PMP) is an 8-bit
parallel I/O module, specifically designed to communi-
cate with a wide variety of parallel devices, such as
communication peripherals, LCDs, external memory
devices and microcontrollers. Because the interface to
parallel peripherals varies significantly, the PMP is
highly configurable. The PMP module can be
configured to serve as either a PMP or as a Parallel
Slave Port (PSP).
FIGURE 11-1:
2011 Microchip Technology Inc.
Parallel Master Port
PARALLEL MASTER PORT
(PMP)
PIC18
PMP MODULE OVERVIEW
PMA<0>
PMALL
PMA<1>
PMALH
PMA<7:2>
PMCS
PMBE
PMRD
PMRD/PMWR
PMWR
PMENB
PMD<7:0>
PMA<7:0>
PMA<15:8>
Microcontroller
PIC18F46J50 FAMILY
Key features of the PMP module are:
• Up to 16 bits of Addressing when Using
• Up to 8 Programmable Address Lines
• One Chip Select Line
• Programmable Strobe Options:
• Address Auto-Increment/Auto-Decrement
• Programmable Address/Data Multiplexing
• Programmable Polarity on Control Signals
• Legacy Parallel Slave Port Support
• Enhanced Parallel Slave Support:
• Programmable Wait States
• Selectable Input Voltage Levels
Data/Address Multiplexing
- Individual Read and Write Strobes or;
- Read/Write Strobe with Enable Strobe
- Address Support
- 4-Byte Deep, Auto-Incrementing Buffer
Up to 8-Bit Address
8-Bit Data
LCD
Address Bus
Data Bus
Control Lines
Buffer
FIFO
DS39931D-page 169
EEPROM
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