PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 178
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PIC18F25J50
Manufacturer Part Number
PIC18F25J50
Description
28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F25J50.pdf
(562 pages)
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PIC18F46J50 FAMILY
11.2
The primary mode of operation for the module is
configured using the MODE<1:0>
PMMODEH register. The setting affects whether the
module acts as a slave or a master and it determines
the usage of the control pins.
11.2.1
In
PMPEN = 1), the module is configured as a Parallel
Slave Port (PSP) with the associated enabled module
FIGURE 11-2:
DS39931D-page 178
Legacy
Slave Port Modes
PIC18F Master
LEGACY MODE (PSP)
mode
PMD<7:0>
PMCS1
PMWR
PMRD
LEGACY PARALLEL SLAVE PORT EXAMPLE
(PMMODEH<1:0> = 00
bits
in
and
the
PMD<7:0>
PMCS
PMRD
PMWR
PIC18F Slave
pins dedicated to the module. In this mode, an external
device, such as another microcontroller or micro-
processor, can asynchronously read and write data
using the 8-bit data bus (PMD<7:0>), the read (PMRD),
write (PMWR) and chip select (PMCS1) inputs. It acts
as a slave on the bus and responds to the read/write
control signals.
Figure 11-2
When chip select is active and a write strobe occurs
(PMCS = 1 and PMWR = 1), the data from
PMD<7:0> is captured into the PMDIN1L register.
displays the connection of the PSP.
Address Bus
Data Bus
Control Lines
2011 Microchip Technology Inc.
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