PIC18F25J50 MICROCHIP [Microchip Technology], PIC18F25J50 Datasheet - Page 106

• Manufacturer Part Number: PIC18F25J50
• Description: 28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F46J50 FAMILY
7.2.2
The Table Latch (TABLAT) is an 8-bit register mapped
into the Special Function Register (SFR) space. The
Table Latch register is used to hold 8-bit data during
data transfers between program memory and data
RAM.
7.2.3
The Table Pointer (TBLPTR) register addresses a byte
within the program memory. The TBLPTR comprises
three SFR registers: Table Pointer Upper Byte, Table
Pointer High Byte and Table Pointer Low Byte
(TBLPTRU:TBLPTRH:TBLPTRL). These three registers
join to form a 22-bit wide pointer. The low-order 21 bits
allow the device to address up to 2 Mbytes of program
memory space. The 22
ID, the user ID and the Configuration bits.
The Table Pointer register, TBLPTR, is used by the
TBLRD and TBLWT instructions. These instructions can
update the TBLPTR in one of four ways based on the
table operation.
Table 7-1
on the TBLPTR only affect the low-order 21 bits.
TABLE 7-1:
FIGURE 7-3:
DS39931D-page 106
TBLRD*
TBLWT*
TBLRD*+
TBLWT*+
TBLRD*-
TBLWT*-
TBLRD+*
TBLWT+*
Example
21
provides these operations. These operations
TABLE LATCH REGISTER (TABLAT)
TABLE POINTER REGISTER
(TBLPTR)
TABLE POINTER OPERATIONS WITH TBLRD AND TBLWT INSTRUCTIONS
TBLPTRU
nd
TABLE POINTER BOUNDARIES BASED ON OPERATION
ERASE: TBLPTR<20:10>
bit allows access to the device
16
15
TABLE WRITE: TBLPTR<20:6>
TBLPTR is incremented before the read/write
TBLPTR is decremented after the read/write
TBLPTR is incremented after the read/write
TABLE READ: TBLPTR<21:0>
TBLPTRH
Operation on Table Pointer
TBLPTR is not modified
registers is written to. When the timed write to program
7.2.4
TBLPTR is used in reads, writes and erases of the
Flash program memory.
When a TBLRD is executed, all 22 bits of the TBLPTR
determine which byte is read from program memory
into TABLAT.
When a TBLWT is executed, the seven Least Significant
bits (LSbs) of the Table Pointer register (TBLPTR<6:0>)
determine which of the 64 program memory holding
memory begins (via the WR bit), the 12 Most Significant
bits (MSbs) of the TBLPTR (TBLPTR<21:10>)
determine which program memory block of 1024 bytes
is written to. For more information, see
“Writing to Flash Program
When an erase of program memory is executed, the
12 MSbs of the Table Pointer register point to the
1024-byte block that will be erased. The LSbs are
ignored.
Figure 7-3
TBLPTR based on Flash program memory operations.
8
7
TABLE POINTER BOUNDARIES
illustrates the relevant boundaries of
TBLPTRL
 2011 Microchip Technology Inc.
Memory”.
Section 7.5
0