MT48LC32M4A2FC-8ELIT MICRON [Micron Technology], MT48LC32M4A2FC-8ELIT Datasheet - Page 55

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MT48LC32M4A2FC-8ELIT

Manufacturer Part Number
MT48LC32M4A2FC-8ELIT
Description
SYNCHRONOUS DRAM
Manufacturer
MICRON [Micron Technology]
Datasheet
TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. For this example, the burst length = 4.
128Mb: x4, x8, x16 SDRAM
128MSDRAM_E.p65 – Rev. E; Pub. 1/02
DQML, DQMH
SYMBOL* MIN
t
t
t
t
t
t
t
COMMAND
AH
AS
CH
CL
CK (3)
CK (2)
CKH
A0-A9, A11
BA0, BA1
DQM /
2. x16: A9 and A11 = “Don’t Care”
CLK
CKE
A10
DQ
x8: A11 = “Don’t Care”
0.8
1.5
2.5
2.5
7.5
0.8
t CMS
7
t CKS
t AS
t AS
t AS
-7E
ACTIVE
T0
ROW
ROW
BANK
MAX
t CKH
t CMH
t AH
t AH
t AH
MIN
0.8
1.5
2.5
2.5
7.5
0.8
10
t RCD
t CK
-75
T1
NOP
MAX
DISABLE AUTO PRECHARGE
ENABLE AUTO PRECHARGE
MIN
t CMS
10
t CL
1
2
3
3
8
1
COLUMN m 2
t DS
WRITE – DQM OPERATION
-8E
WRITE
T2
BANK
D
IN
MAX
t CMH
t DH
m
t CH
UNITS
ns
ns
ns
ns
ns
ns
ns
T3
NOP
55
SYMBOL* MIN
t
t
t
t
t
t
CKS
CMH
CMS
DH
DS
RCD
t DS
D
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T4
NOP
IN
m + 2
t DH
1.5
0.8
1.5
0.8
1.5
15
1
-7E
t DS
MAX
D
T5
IN
NOP
m + 3
t DH
128Mb: x4, x8, x16
MIN
1.5
0.8
1.5
0.8
1.5
20
-75
MAX
NOP
T6
MIN
20
2
1
2
1
2
©2001, Micron Technology, Inc.
SDRAM
-8E
MAX
NOP
DON’T CARE
T7
UNITS
ns
ns
ns
ns
ns
ns

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