MT48LC32M4A2FC-8ELIT MICRON [Micron Technology], MT48LC32M4A2FC-8ELIT Datasheet - Page 37

• Manufacturer Part Number: MT48LC32M4A2FC-8ELIT
• Description: SYNCHRONOUS DRAM
• Manufacturer: MICRON [Micron Technology]

DQML, DQMH
TIMING PARAMETERS
*CAS latency indicated in parentheses.
NOTE: 1. If CS# is HIGH at clock HIGH time, all commands applied are NOP, with CKE a “Don’t Care.”
128Mb: x4, x8, x16 SDRAM
128MSDRAM_E.p65 – Rev. E; Pub. 1/02
COMMAND
SYMBOL* MIN
t
t
t
t
t
t
t
A0-A9, A11
AH
AS
CH
CL
CK (3)
CK (2)
CKH
DQM /
BA0, BA1
CLK
CKE
A10
DQ
2. The mode register may be loaded prior to the AUTO REFRESH cycles if desired.
3. JEDEC and PC100 specify three clocks.
4. Outputs are guaranteed High-Z after command is issued.
T = 100µs
(
(
(
(
(
(
(
0.8
1.5
2.5
2.5
7.5
0.8
)
)
)
)
(
)
(
)
)
(
(
(
(
(
)
Power-up:
V
CLK stable
)
)
)
)
)
)
(
(
(
(
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(
(
7
)
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)
)
)
)
(
(
(
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)
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)
)
)
)
MIN
DD
-7E
and
t CKS
t CMS
MAX
T0
NOP
t CKH
High-Z
t CMH
MIN
0.8
1.5
2.5
2.5
7.5
0.8
10
SINGLE BANK
ALL BANKS
t CK
t CMS
-75
BANKS
PRECHARGE
ALL
T1
MAX
INITIALIZE AND LOAD MODE REGISTER
t CMH
t RP
Precharge
all banks
(
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)
(
(
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(
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(
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(
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(
)
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)
)
)
)
)
)
)
MIN
t CMS
10
1
2
3
3
8
1
Tn + 1
REFRESH
AUTO
-8E
t CMH
t CH
MAX
AUTO REFRESH
t RFC
UNITS
NOP
ns
ns
ns
ns
ns
ns
ns
(
(
(
(
(
(
(
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(
(
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(
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(
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)
)
NOP
37
t CL
To + 1
REFRESH
AUTO
SYMBOL* MIN
t
t
t
t
t
t
CKS
CMH
CMS
MRD
RFC
RP
AUTO REFRESH
Micron Technology, Inc., reserves the right to change products or specifications without notice.
3
t RFC
NOP
(
(
(
(
(
(
1.5
0.8
1.5
)
(
)
)
)
)
)
(
)
(
(
(
(
(
66
15
)
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)
)
(
(
(
(
(
(
2
(
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(
)
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)
)
)
)
)
)
NOP
-7E
MAX
t AS
t AS
LOAD MODE
128Mb: x4, x8, x16
Tp + 1
REGISTER
CODE
CODE
1
MIN
1.5
0.8
1.5
t AH
t AH
66
20
2
Program Mode Register
-75
MAX
t MRD
Tp + 2
NOP
MIN
70
20
2
1
2
2
©2001, Micron Technology, Inc.
SDRAM
-8E
2, 3, 4
MAX
Tp + 3
ACTIVE
BANK
ROW
ROW
DON’T CARE
UNITS
t
ns
ns
ns
CK
ns
ns